Luca Bertaccini
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Designer for following chips
Publications related to the chips in the gallery
- Thomas Benz, Luca Bertaccini, Florian Zaruba, Fabian Schuiki, Frank K. Gurkaynak, Luca Benini, "A 10-core SoC with 20 Fine-Grain Power Domains for Energy-Proportional Data-Parallel Processing over a Wide Voltage and Temperature Range", In Proc. IEEE 47th European Solid State Circuits Conference (ESSCIRC), Grenoble, France, 2021, pp. 263-266, DOI: 10.1109/ESSCIRC53450.2021.9567755
- Mattia Sinigaglia, Luca Bertaccini, Luca Valente, Angelo Garofalo, Simone Benatti, Luca Benini, Francesco Conti, Davide Rossi, "ECHOES: a 200 GOPS/W Frequency Domain SoC with FFT Processor and I2S DSP for Flexible Data Acquisition from Microphone Arrays", IEEE International Symposium on Circuits and Systems (ISCAS 2023), 21-25 May 2023, Monterey CA, USA, DOI: 10.1109/ISCAS46773.2023.10181862
- Luca Bertaccini, Gianna Paulin, Tim Fischer, Stefan Mach, Luca Benini, "MiniFloat-NN and ExSdotp: An ISA Extension and a Modular Open Hardware Unit for Low-Precision Training on RISC-V Cores", 2022 IEEE 29th Symposium on Computer Arithmetic (ARITH), Lyon, France, 2022, pp. 1-8, DOI: 10.1109/ARITH54963.2022.00010
- Gianna Paulin, Paul Scheffler, Thomas Benz, Matheus Cavalcante, Tim Fischer, Manuel Eggimann, Yichao Zhang, Nils Wistoff, Luca Bertaccini, Luca Colagrande, Gianmarco Ottavi, Frank K. Gurkaynak, Davide Rossi, Luca Benini, "Occamy: A 432-Core 28.1 DP-GFLOP/s/W 83% FPU Utilization Dual-Chiplet, Dual-HBM2E RISC-V-Based Accelerator for Stencil and Sparse Linear Algebra Computations with 8-to-64-bit Floating-Point Support in 12nm FinFET", In Proc. IEEE Symposium on VLSI Technology and Circuits 2024, Honolulu, HI, USA, 2024, pp. 1-2,, DOI: 10.1109/VLSITechnologyandCir46783.2024.10631529