Tim Fischer
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Designer for following chips
Publications related to the chips in the gallery
- Moritz Scherer, Alfio Di Mauro, Georg Rutishauser, Tim Fischer, Luca Benini, "A 1036 TOp/s/W, 12.2 mW, 2.72 μJ/Inference All Digital TNN Accelerator in 22 nm FDX Technology for TinyML Applications", IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS 2022), DOI: 10.1109/COOLCHIPS54332.2022.9772668
- Luca Bertaccini, Gianna Paulin, Tim Fischer, Stefan Mach, Luca Benini, "MiniFloat-NN and ExSdotp: An ISA Extension and a Modular Open Hardware Unit for Low-Precision Training on RISC-V Cores", 2022 IEEE 29th Symposium on Computer Arithmetic (ARITH), Lyon, France, 2022, pp. 1-8, DOI: 10.1109/ARITH54963.2022.00010
- Gianna Paulin, Paul Scheffler, Thomas Benz, Matheus Cavalcante, Tim Fischer, Manuel Eggimann, Yichao Zhang, Nils Wistoff, Luca Bertaccini, Luca Colagrande, Gianmarco Ottavi, Frank K. Gurkaynak, Davide Rossi, Luca Benini, "Occamy: A 432-Core 28.1 DP-GFLOP/s/W 83% FPU Utilization Dual-Chiplet, Dual-HBM2E RISC-V-Based Accelerator for Stencil and Sparse Linear Algebra Computations with 8-to-64-bit Floating-Point Support in 12nm FinFET", In Proc. IEEE Symposium on VLSI Technology and Circuits 2024, Honolulu, HI, USA, 2024, pp. 1-2,, DOI: 10.1109/VLSITechnologyandCir46783.2024.10631529