Moritz Scherer
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Designer for following chips
Publications related to the chips in the gallery
- Moritz Scherer, Alfio Di Mauro, Georg Rutishauser, Tim Fischer, Luca Benini, "A 1036 TOp/s/W, 12.2 mW, 2.72 μJ/Inference All Digital TNN Accelerator in 22 nm FDX Technology for TinyML Applications", IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS 2022), DOI: 10.1109/COOLCHIPS54332.2022.9772668
- Arpan Prasad, Moritz Scherer, Davide Rossi, Alfio Di Mauro, Manuel Eggimann, Jorge Tomas Gomez, Ziyun Li, Syed Shakib Sarwar, Zhao Wang, Barbara De Salvo, Luca Benini, "Siracusa: A Low-Power On-Sensor RISC-V SoC for Extended Reality Visual Processing in 16nm CMOS", IEEE 49th European Solid State Circuits Conference (ESSCIRC 2023), Lisbon, Portugal, 2023, pp. 217-220, DOI: 10.1109/ESSCIRC59616.2023.10268718