| Application | Test |
| Technology | 600 |
| Manufacturer | austriamicrosystems |
| Type | Research Project |
| Package | LCC84 |
| Voltage | 3.3 V |
| Clock | 180 MHz |
This chip includes 24 different local clock generator architectures each with a different configuration for a programmable delay line. The design goal was to explore possibilities for sub-gate delay resolution delay lines to be used within GALS systems.