The IIS Chip Gallery
Sir10us (2013)
Additional pictures below, click to see larger versions
by
| Application | Processor |
| Technology | 180 |
| Manufacturer | UMC |
| Type | Semester Thesis |
| Package | QFN56 |
| Dimensions | 1525μm x 1525μm |
| Gates | 100 kGE |
| Voltage | 1.8 V |
| Power | 93 mW, 166MHz 1.8V |
| Clock | 166 MHz |
This chip is a re-implementation of Halley where the custom processor has been replaced by the Open RISC core implemented in Or10n.
While in Halley the program has to be written in custom assembly, in this chip standard GNU programming tools can be used. When compared to Or10n, Sir10us contains a larger instruction memory and a smaller data memory.
Accelerating the Open-RISC with the co-processor speeds up signature verification according to ECDSA by a factor of 15 with respect to a portable C implementation. Verification on the co-processor is not only faster but also cuts energy dissipation by a factor of 21.
The logo is a word play between Sirius which is an astronomical term just like Halley and Orion and the famous quote from the movie Dark Knight: "why so serious?".