Luca Benini

Links

• Personal home page
• IIS Page

Designer for following chips

• Pulp (2013)
• Pulpv2 (2014)
• Diego (2015)
• Honey_bunny (2015)
• Manny (2015)
• Mia_wallace (2015)
• Pulpv3 (2015)
• Sid (2015)
• Occamy (2022)

Publications related to the chips in the gallery

• Davide Rossi, Antonio Pullini, Igor Loi, Michael Gautschi, Frank K. Gurkaynak, Andrea Bartolini, Philippe Flatresse, Luca Benini, "A 60 GOPS/W, -1.8 V to 0.9 V body bias ULP cluster in 28 nm UTBB FD-SOI technology", Journal of Solid-State Electronics, Volume 117, March 2016, Pages 170-184, DOI: 10.1016/j.sse.2015.11.015
  
  
• Michael Gautschi, Michael Muehlberghuber, Andreas Traber, Sven Stucki, Matthias Baer, Renzo Andri, Beat Muheim, Luca Benini, Hubert Kaeslin, "SIR10US: A tightly coupled elliptic-curve cryptography co-processor for the OpenRISC", 2014 IEEE 25th International Conference on Application-specific Systems, Architectures and Processors (ASAP), 18-20 June 2014, Zurich, pp 25-29, DOI: 10.1109/ASAP.2014.6868626
  
  
• Michael Gautschi, Michael Schaffner, Frank K. Gurkaynak, Luca Benini, "An Extended Shared Logarithmic Unit for Nonlinear Function Kernel Acceleration in a 65-nm CMOS Multicore Cluster", IEEE Journal of Solid-State Circuits, Volume: 52, Issue: 1, Jan. 2017, pp 98-112, DOI: 10.1109/JSSC.2016.2626272
  
  
• Simone Benatti, Filippo Casamassima, Bojan Milosevic, Elisabetta Farella, Philipp Schoenle, Schekeb Fateh, Thomas Burger, Qiuting Huang, Luca Benini, "A Versatile Embedded Platform for EMG Acquisition and Gesture Recognition", IEEE Transactions on Biomedical Circuits and Systems, Oct 2015, Vol:9, Issue 5, pp: 620-630, DOI: 10.1109/TBCAS.2015.2476555
  
  
• Schekeb Fateh, Philipp Schoenle, Luca Bettini, Giovanni Rovere, Luca Benini, Qiuting Huang, "A Reconfigurable 5-to-14 bit SAR ADC for Battery-Powered Medical Instrumentation", IEEE Transactions on Circuits and Systems I: Regular Papers, Nov. 2015, Vol:62, Issue: 11, pp: 2685-2694, DOI: 10.1109/TCSI.2015.2477580
  
  
• Marco Crescentini, Marco Biondi, Marco Bennati, Paolo Alberti, Giulia Luciani, Cinzia Tamburini, Matteo Pizotti, Aldo Romani, Marco Tartagni, David Bellasi, Davide Rossi, Luca Benini, Marco Marchesi, Domenicos Cristaudo, "A 2 MS/s 10A Hall current sensor SoC with digital compressive sensing encoder in 0.16 um BCD", Proceedings of the 42nd Eurpoean Solid-State Circuits Conference (ESSCIRC-2016), pp 393-396, DOI: 10.1109/ESSCIRC.2016.7598324
  
  
• Lukas Cavigelli, David Gschwend, Christoph Mayer, Samuel Willi, Beat Muheim, Luca Benini, "Origami: A Convolutional Network Accelerator", IN Proc. of the 25th edition on Great Lakes Symposium on VLSI (GLSVLSI'15) pp 199-204, 2015, DOI: 10.1145/2742060.2743766
  
  
• Davide Rossi, Antonio Pullini, Igor Loi, Michael Gautschi, Frank K. Gurkaynak, Adam Teman, Jeremy Constantin, Andreas Burg, Ivan Miro-Panades, Edith Beigne, Fabien Clermidy, Philippe Flatresse, Luca Benini, "Energy-Efficient Near-Threshold Parallel Computing: The PULPv2 Cluster", IEEE Micro, vol. 37, no. 5, pp. 20-31, DOI: 10.1109/MM.2017.3711645
  
  
• Michael Gautschi, Michael Schaffner, Frank K. Gurkaynak, Luca Benini, "A 65nm CMOS 6.4-to-29.2pJ/FLOP@0.8V shared logarithmic floating point unit for acceleration of nonlinear function kernels in a tightly coupled processor cluster", 2016 IEEE International Solid-State Circuits Conference (ISSCC), pp 82 - 83, DOI: 10.1109/ISSCC.2016.7417917
  
  
• Francesco Conti, Robert Schilling, Davide Schiavone, Antonio Pullini, Davide Rossi, Frank K. Gurkaynak, Michael Muehlberghuber, Michael Gautschi, Igor Loi, Germain Haougou, Stefan Mangard, Luca Benini, "An IoT Endpoint System-on-Chip for Secure and Energy-Efficient Near-Sensor Analytics", IEEE Transactions on Circuits and Systems I: Regular Papers, Vol: 64, Issue: 9, Sept. 2017, pp 2481 - 2494, DOI: 10.1109/TCSI.2017.2698019
  
  
• Antonio Pullini, Francesco Conti, Davide Rossi, Igor Loi, Michael Gautschi, Luca Benini, "A heterogeneous multi-core system-on-chip for energy efficient brain inspired vision", IEEE Transactions on Circuits and Systems II: Express Briefs ( Volume: PP, Issue: 99 ), 2017, DOI: 10.1109/TCSII.2017.2652982
  
  
• Michael Schaffner, Michael Gautschi, Frank K. Gurkaynak, Luca Benini, "Accuracy and Performance Trade-offs of Logarithmic Number Units in Multi-Core Clusters", 23rd IEEE Symposium on Computer Arithmetic (ARITH 2016), Santa Clara USA, DOI: 10.1109/ARITH.2016.10
  
  
• Davide Rossi, Antonio Pullini, Christoph Mueller, Igor Loi, Francesco Conti, Andreas Burg, Luca Benini, Philippe Flatresse, "A Self-Aware Architecture for PVT Compensation and Power Nap in Near Threshold Processors", IEEE Design & Test, vol. 34, no. 6, pp. 46-53, Dec. 2017, DOI: 10.1109/MDAT.2017.2750907
  
  
• Francesco Conti, Lukas Cavigelli, Gianna Paulin, Igor Susmelj, Luca Benini, "Chipmunk: A Systolically Scalable 0.9 mm2, 3.08 Gop/s/mW @ 1.2 mW Accelerator for Near-Sensor Recurrent Neural Network Inference", In IEEE Custom Integrated Circuits Conference (CICC), 2018, DOI: 10.1109/CICC.2018.8357068
  
  
• Florian Glaser, Stefan Mach, Abbas Rahimi, Frank K. Gurkaynak, Qiuting Huang, Luca Benini, "An 826 MOPS, 210uW/MHz Unum ALU in 65 nm", In Proc. 2018 IEEE International Symposium on Circuits and Systems (ISCAS), 27-30 May 2018, Florence, Italy, pp 1-5, DOI: 10.1109/ISCAS.2018.8351546
  
  
• Philipp Schoenle, Giovanni Rovere, Florian Glaser, Jonathan Boesser, Noe Brun, Xu Han, Thomas Burger, Schekeb Fateh, Qing Wang, Luca Benini, Qiuting Huang, "A multi-sensor and parallel processing SoC for wearable and implantable telemetry systems", Proceedings of the 43rd IEEE European Solid State Circuits Conference, (ESSCIRC-2017),, DOI: 10.1109/ESSCIRC.2017.8094564
  
  
• Philipp Schoenle, Florian Glaser, Thomas Burger, Giovanni Rovere, Luca Benini, Qiuting Huang, "A Multi-Sensor and Parallel Processing SoC for Miniaturized Medical Instrumentation", IEEE Journal of Solid-State Circuits PP issue:99, pp 1-12, DOI: 10.1109/JSSC.2018.2815653
  
  
• Eric Flamand, Davide Rossi, Francesco Conti, Igor Loi, Antonio Pullini, Florent Rotenberg, Luca Benini, "GAP-8: A RISC-V SoC for AI at the Edge of the IoT", In Proc. IEEE 29th International Conference on Application-specific Systems, Architectures and Processors (ASAP), Milan, Italy, 2018, pp. 1-4,European Solid State Circuits Conference (ESSCIRC) 2018, 3-6 Sep 2018, Dresden, DOI: 10.1109/ASAP.2018.8445101
  
  
• Antonio Pullini, Davide Rossi, Igor Loi, Giuseppe Tagliavini, Luca Benini, "Mr.Wolf: An Energy-Precision Scalable Parallel Ultra Low Power SoC for IoT Edge Processing", In IEEE Journal of Solid-State Circuits, vol. 54, no. 7, pp. 1970-1981, July 2019, DOI: 10.1109/JSSC.2019.2912307
  
  
• Davide Schiavone, Davide Rossi, Alfio Di Mauro, Frank K. Gurkaynak, Timothy Saxe, Mao Wang, Ket Chong Yap, Luca Benini, "Arnold: an eFPGA-Augmented RISC-V SoC for Flexible and Low-Power IoT End-Nodes", in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 29, no. 4, pp. 677-690, April 2021 arXiv: 2006.14256 10.1109/TVLSI.2021.3058162
  
  
• Florian Zaruba, Fabian Schuiki, Stefan Mach, Luca Benini, "The Floating Point Trinity: A Multi-modal Approach to Extreme Energy-Efficiency and Performance", In Proc. 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS), Genoa, Italy, 2019, DOI: 10.1109/ICECS46596.2019.8964820
  
  
• Gianna Paulin, Francesco Conti, Lukas Cavigelli, Luca Benini, "Vau Da Muntanialas: Energy-Efficient Multi-Die Scalable Acceleration of RNN Inference", in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 69, no. 1, pp. 244-257, Jan. 2022, DOI: 10.1109/TCSI.2021.3099716
  
  
• Alfio Di Mauro, Francesco Conti, Davide Schiavone, Davide Rossi, Luca Benini, "Always-On 674uW @4GOP/s Error Resilient Binary Neural Networks With Aggressive SRAM Voltage Scaling on a 22-nm IoT End-Node", In IEEE Transactions on Circuits and Systems I: Regular Papers, Volume 67, Issue 11, November 2020, DOI: 10.1109/TCSI.2020.3012576
  
  
• Andrawes Al Bahou, Geethan Karunaratne, Renzo Andri, Lukas Cavigelli, Luca Benini, "XNORBIN: A 95 TOp/s/W hardware accelerator for binary convolutional neural networks", In Proc. 2018 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS), April 2018, Yokohama, Japan, DOI: 10.1109/CoolChips.2018.8373076
  
  
• Florian Zaruba, Fabian Schuiki, Luca Benini, "Manticore: A 4096-core RISC-V Chiplet Architecture for Ultra-efficient Floating-point Computing", Presented at Hot Chips: A Symposium on High Performance Chips (HC32) 2020, arXiv: 2008.06502
  
  
• Florian Zaruba, Fabian Schuiki, Torsten Hoefler, Luca Benini, "Snitch: A 10 kGE Pseudo Dual-Issue Processor for Area and Energy Efficient Execution of Floating-Point Intensive Workloads", arXiv preprint cs.AR/2002.10143, 2020
  
  
• Hayate Okuhara, Ahmed Elnaqib, Martino Dazzi, Pierpaolo Plestri, Simone Benatti, Luca Benini, Davide Rossi, "A Fully Integrated 5-mW, 0.8-Gbps Energy-Efficient Chip-to-Chip Data Link for Ultralow-Power IoT End-Nodes in 65-nm CMOS", IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 29, no. 10, pp. 1800-1811, Oct. 2021, DOI: 10.1109/TVLSI.2021.3108806
  
  
• Odem Harel, Emanuel Nieto Casarrubias, Manuel Eggimann, Frank K. Gurkaynak, Luca Benini, Adam Teman, Robert Gitermann, Andreas Burg, "64-kB 65-nm GC-eDRAM With Half-Select Support and Parallel Refresh Technique", in IEEE Solid-State Circuits Letters, vol. 5, pp. 170-173, 2022, DOI: 10.1109/LSSC.2022.3182531
  
  
• Gianmarco Ottavi, Angelo Garofalo, Giuseppe Tagliavini, Francesco Conti, Alfio Di Mauro, Luca Benini, Davide Rossi, "Dustin: A 16-Cores Parallel Ultra-Low-Power Cluster With 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode", IEEE Transactions on Circuits and Systems I: Regular Papers, DOI: 10.1109/TCSI.2023.3254810
  
  
• Thomas Benz, Luca Bertaccini, Florian Zaruba, Fabian Schuiki, Frank K. Gurkaynak, Luca Benini, "A 10-core SoC with 20 Fine-Grain Power Domains for Energy-Proportional Data-Parallel Processing over a Wide Voltage and Temperature Range", In Proc. IEEE 47th European Solid State Circuits Conference (ESSCIRC), Grenoble, France, 2021, pp. 263-266, DOI: 10.1109/ESSCIRC53450.2021.9567755
  
  
• Davide Rossi, Francesco Conti, Manuel Eggimann, Alfio Di Mauro, Giuseppe Tagliavini, Stefan Mach, Marco Guermandi, Antonio Pullini, Igor Loi, Jie Chen, Eric Flamand, Luca Benini, "Vega: A Ten-Core SoC for IoT Endnodes With DNN Acceleration and Cognitive Wake-Up From MRAM-Based State-Retentive Sleep Mode", in IEEE Journal of Solid-State Circuits, vol. 57, no. 1, pp. 127-139, Jan. 2022, DOI: 10.1109/JSSC.2021.3114881
  
  
• Angelo Garofalo, Yvan Tortorella, Matteo Perotti, Luca Valente, Alessandro Nadalini, Luca Benini, Davide Rossi, Francesco Conti, "DARKSIDE: A Heterogeneous RISC-V Compute Cluster for Extreme-Edge On-Chip DNN Inference and Training", IEEE Open Journal of the Solid-State Circuits Society, vol. 2, pp. 231-243, 2022, DOI: 10.1109/OJSSCS.2022.3210082
  
  
• Moritz Scherer, Alfio Di Mauro, Georg Rutishauser Tim Fischer, Luca Benini, "A 1036 TOp/s/W, 12.2 mW, 2.72 μJ/Inference All Digital TNN Accelerator in 22 nm FDX Technology for TinyML Applications", IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS 2022), DOI: 10.1109/COOLCHIPS54332.2022.9772668
  
  
• Francesco Conti, Davide Rossi, Gianna Paulin, Angelo Garofalo, Alfio Di Mauro, Georg Rutishauser, Gianmarco Ottavi, Manuel Eggimann, Hayate Okuhara, Vincent Huard, Olivier Montfort, Lionel Jure, N. Exibart, Pascal Gouedo, Mathieu Louvat, E. Botte, Luca Benini, "A 12.4TOPS/W @ 136GOPS AI-IoT System-on-Chip with 16 RISC-V, 2-to-8b Precision-Scalable DNN Acceleration and 30%-Boost Adaptive Body Biasing", International Solid-State Circuits Conference (ISSCC 2023)
  
  
• Luca Bertaccini, Gianna Paulin, Tim Fischer, Stefan Mach, Luca Benini, "MiniFloat-NN and ExSdotp: An ISA Extension and a Modular Open Hardware Unit for Low-Precision Training on RISC-V Cores", 2022 IEEE 29th Symposium on Computer Arithmetic (ARITH), Lyon, France, 2022, pp. 1-8, DOI: 10.1109/ARITH54963.2022.00010