Michael Schaffner

Designer for following chips

• Esper (2010)
• Vesper (2011)
• Eva_longoria (2012)
• Madmax (2012)
• Sandstorm (2012)
• Artemis (2014)
• Diana (2014)
• Hecate (2014)
• Selene (2014)
• Diego (2015)
• Manny (2015)
• Phoebe (2015)
• Sid (2015)
• Hydra (2016)
• Phoenix (2016)
• Unum (2016)

Publications related to the chips in the gallery

• Pierre Greisen, Michael Schaffner, Simon Heinzle, Marian Runo, Aljoscha Smolic, Andreas Burg, Hubert Kaeslin, Markus Gross, "Analysis and VLSI Implementation of EWA Rendering for Real-Time HD Video Applications", IEEE Transactions on Circuits and Systems for Video Technology, vol:22, Issue:11, pp:1577-1589, DOI: 10.1109/TCSVT.2012.2201671
  
  
• Pierre Greisen, Richard Emler, Michael Schaffner, Simon Heinzle, Frank K. Gurkaynak, "A general-transformation EWA view rendering engine for 1080p video in 130 nm CMOS", IEEE/IFIP 20th International Conference on VLSI and System-on-Chip (VLSI-SoC 2012) pp:105-110, DOI: 10.1109/VLSI-SoC.2012.6379014
  
  
• Pierre Greisen, Michael Schaffner, Danny Luu, Val Mikos, Simon Heinzle, Frank K. Gurkaynak, Aljoscha Smolic, "Spatially-Varying Image Warping: Evaluations and VLSI Implementations", Chapter in, VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design, DOI: 10.1007/978-3-642-45073-0_4
  
  
• Michael Schaffner, Pierre Greisen, Simon Heinzle, Frank K. Gurkaynak, Hubert Kaeslin, Aljoscha Smolic, "MADmax: A 1080p stereo-to-multiview rendering ASIC in 65 nm CMOS based on image domain warping", Proceedings of the ESSCIRC (ESSCIRC), 2013, pp-61-64, DOI: 10.1109/ESSCIRC.2013.6649072
  
  
• Michael Schaffner, Lukas Cavigelli, Pascal Alexander Hager, Pierre Greisen, Frank K. Gurkaynak, Hubert Kaeslin, "A real-time 720p feature extraction core based on Semantic Kernels Binarized", IFIP/IEEE 21st International Conference on Very Large Scale Integration (VLSI-SoC 2013), pp 27-32, DOI: 10.1109/VLSI-SoC.2013.6673240
  
  
• Michael Gautschi, Michael Schaffner, Frank K. Gurkaynak, Luca Benini, "An Extended Shared Logarithmic Unit for Nonlinear Function Kernel Acceleration in a 65-nm CMOS Multicore Cluster", IEEE Journal of Solid-State Circuits, Volume: 52, Issue: 1, Jan. 2017, pp 98-112, DOI: 10.1109/JSSC.2016.2626272
  
  
• Michael Gautschi, Michael Schaffner, Frank K. Gurkaynak, Luca Benini, "A 65nm CMOS 6.4-to-29.2pJ/FLOP@0.8V shared logarithmic floating point unit for acceleration of nonlinear function kernels in a tightly coupled processor cluster", 2016 IEEE International Solid-State Circuits Conference (ISSCC), pp 82 - 83, DOI: 10.1109/ISSCC.2016.7417917
  
  
• Michael Schaffner, Michael Gautschi, Frank K. Gurkaynak, Luca Benini, "Accuracy and Performance Trade-offs of Logarithmic Number Units in Multi-Core Clusters", 23rd IEEE Symposium on Computer Arithmetic (ARITH 2016), Santa Clara USA, DOI: 10.1109/ARITH.2016.10