The IIS Chip Gallery

Unum (2016)

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by

Lucas Mayrhofer, David Oelen, Michael Gautschi, Florian Glaser, Florian Scheidegger, Michael Schaffner

Main Details

Application	Processor
Technology	65
Manufacturer	UMC
Type	Semester Thesis
Package	QFN40
Dimensions	1252μm x 1252μm
Gates	180 kGE
Voltage	1.2 V
Power	43.1 mW @ 1.08 V, 200 MHz
Clock	400 MHz

Description

This chip implements the unum number format developed by Dr. John Gustafson. The chip contains an ALU that accepts two unum numbers with a tag that has 4bit exponent and 5bit mantissa (unum45) that comprise an ubound. It can add/subtract these numbers, and calculate an optimized bound for the result.

Related Publication

• Florian Glaser, Stefan Mach, Abbas Rahimi, Frank K. Gurkaynak, Qiuting Huang, Luca Benini, "An 826 MOPS, 210uW/MHz Unum ALU in 65 nm", In Proc. 2018 IEEE International Symposium on Circuits and Systems (ISCAS), 27-30 May 2018, Florence, Italy, pp 1-5, DOI: 10.1109/ISCAS.2018.8351546