The IIS Chip Gallery
Chiffre (2025)
Additional pictures below, click to see larger versions
by
| Application | Pulp |
| Technology | 130 |
| Manufacturer | IHP |
| Type | Teaching |
| Package | QFN56 |
| Dimensions | 2235μm x 2235μm |
| Gates | 160 kGE |
| Voltage | 1.2 V |
| Clock | 80 MHz |
Chiffre adds a transparent SPI peripheral to Croc. The peripheral has been enhanced to include software code to support writing and reading SD card commands in hardware as well as adding a bootrom that allows programs to run directly from SD card at boot time.
See also the GitHub page for the project. End-to-end open-source allows us to share all aspects of the design freely.
This chip was designed as part of the VLSI design course at ETH Zurich which uses a (mostly) open source design flow for its exercises. Students are required to modify a Croc based SoC to improve its capabilities somehow to pass the course. This was one of the top-rated designs from the course and has been sent to manufacturing.
Other chips from this series include:
This design has received generous support from Leibniz Institute for High Performance Microelectronics through the BMBF project FMD-QNC (16ME0831).